Experimental and simulation study of fill-factor enhancement using a virtual guard ring in n+/p-well CMOS single-photon avalanche diodes

The use of a physical guard ring in CMOS single-photon avalanche diodes (SPADs) based on n + /(deep)p-well and p /(deep)n-well structures is common solution to control the electric field SPADs periphery prevent premature lateral breakdown. However, this leads decrease detection efficiency, i.e., fill-factor, especially when size reduced. Our paper presents an experimental simulation study replacing by virtual improve fill-factor scalability / p-well SPAD implemented 0.35-μm pin-photodiode technology. Accordingly, optimization its superiority at downscaling are discussed, with respect quantified